•  
  •  
 

Keywords

FPGA, hyperbolic sine, hyperbolic cosine, area minimization, low latency

Document Type

Research Paper

Abstract

This paper presents the implementations of the hyperbolic sine and cosine functions, which are essential in many digital systems. In the previous eras, these functions were only implemented in software; however, hardware implementations have recently become more significant due to the performance advantages of hardware systems over software implementations. Therefore, these functions can be hardware implemented using various methods such as the CORDIC algorithm, Taylor series, polynomial approximation technique, and LUT approach. This paper focuses on reducing area utilization (logic components), low latency, and reducing power consumption. Five designs are proposed based on different techniques, in which the ROM approach achieved the best results compared to the other four proposed designs. It also achieved low area utilization, high speed and low power consumption compared to the related works where the ROM approach consumes the resource utilization are as follows: zero flip-flops, (26) occupied slices, and (43) look-up tables. The total power consumed is about (56 mW), and there is a high execution speed of one clock cycle.

References

E. Volder, The CORDIC trigonometric computing technique, IRE Trans. Electron. Comput., (1959) 330–334. http://dx.doi.org/10.1109/TEC.1959.5222693 Singhal, A. Goen, T. Mohapatra, FPGA implementation and power efficient CORDIC based ADPLL for signal processing and application, Int. Conf. Commun. Syst. Netw., (2017) 325–329. http://dx.doi.org/10.1109/CSNT.2017.8418560 Wang, Design and implementation of CORDIC algorithm based on FPGA, Int. Conf. Robots Intell. Syst., (2018) 70–71. http://dx.doi.org/10.1109/ICRIS.2018.00026 A. Kumar, FPGA Implementation of the Trigonometric Functions Using the CORDIC Algorithm, Int. Conf. Adv. Comput. Commun. Syst., (2019) 894–900. http://dx.doi.org/10.1109/ICACCS.2019.8728315 Meenpal, Efficient MUX based CORDIC on FPGA for signal processing application, IEEE Int. Conf. Intell. Comput. Commun., (2019) 1–6. Dick, CORDIC architectures for FPGA computing, in Reconfigurable Computing, Elsevier, (2008) 513–537. Heidarpur, A. Ahmadi, M. Ahmadi, M. R. Azghadi, CORDIC-SNN: On-FPGA STDP learning with izhikevich neurons, IEEE Trans. Circuits Syst. I Regul. Pap., 66 (2019) 2651–2661. https://doi.org/10.1109/TCSI.2019.2899356 Salehi, E. Farshidi, H. Kaabi, Novel design for a low-latency CORDIC algorithm for sine-cosine computation and its Implementation on FPGA, Microprocess. Microsyst., 77 (2020) 103197. https://doi.org/10.1016/j.micpro.2020.103197 K. Jain , C. Engineering, Design and FPGA Implementation of CORDIC-based 8-point 1D DCT Processor, 107 (2011) 48. Lashko , O. Zakaznov, VHDL implementation of CORDIC algorithm for wireless LAN. Institutionen för systemteknik, 2004. Paulsson, M. Hübner, J. Becker, Dynamic power optimization by exploiting self-reconfiguration in Xilinx Spartan 3-based systems, Microprocess. Microsyst., 33 (2009) 46–52. https://doi.org/10.1016/j.micpro.2008.08.006 Muttaqin, Z. Abidin, R. A. Setyawan, I. A. Zahra, Development of advanced automated test equipment for digital system by using FPGA, Indones. J. Electr. Eng. Comput. Sci., 15 (2019) 661–670. http://doi.org/10.11591/ijeecs.v15.i2.pp661-670 Kuon , J. Rose, Measuring the gap between FPGAs and ASICs, IEEE Trans. Comput. Des. Integr. circuits Syst., 26 (2007) 203–215. http://doi.org/10.1109/TCAD.2006.884574 Nasser , I. A. Hashim, Power Optimization of Binary Multiplier Based on FPGA, Eng. Technol. J., 39 (2021) 1492–1505. http://doi.org/10.30684/etj.v39i10.2156 T. Naser, S. N. Hadi, I. A. Hashim, Power Optimization of KNN Algorithm Based on FPGA, Int. Iraqi Conf. Eng.Technol. Their Appl., ( 2021) 168–174. T. Nasser, I.A. Hashim, Power optimization of binary division based on FPGA, Indo. J. Electr. Eng. Comp.Sci., 24 (2023). http://doi.org/10.11591/ijeecs.v24.i3.pp1354-1366   Sudha, M. C. Hanumantharaju, V. Venkateswarulu, H. Jayalaxmi, A novel method for computing exponential function using CORDIC algorithm, Procedia Eng., 30 (2012) 519–528. http://doi.org/10.1016/j.proeng.2012.01.893 Saha, K. G. Kumar, A. Ghosh, M. K. Naskar, Area efficient architecture of Hyperbolic functions for high frequency applications, Int. Conf. Circuits, Cont. Commun., 3 (2018) 139–142. http://doi.org/10.1109/CCUBE.2017.8394139 Fu, J. Xia, X. Lin, M. Liu, M. Wang, Low-latency hardware implementation of high-precision hyperbolic functions sinhx and coshx based on improved CORDIC algorithm, Electron., 10 (2021) 2533. http://doi.org/10.3390/electronics10202533 da Fontoura Costa, The Exponential Function: A Mathemagical Hub, 2022. Gisuthan, T. Srikanthan, K. V. Asari, A High speed flat CORDIC based neuron with multi-level activation function for robust pattern recognition, Proc. Fifth IEEE Int. Work. Comp. Archit. Mach. Perc., (2000) 87–94. http://doi.org/10.1109/camp.2000.875962 Chakraborty, S. Pervin, T. S. Lamba, A hyperbolic LMS algorithm for CORDIC based realization, IEEE Work. Stat. Signal Process. Proc., (2001) 373–376. http://doi.org/10.1109/ssp.2001.955300 Qian , A. Qing, Application of CORDIC Algorithm, 2004 (2006) 504–508. Meyer-Bäse, R. Watzel, U. Meyer-Bäse, and S. Foo, A parallel CORDIC architecture dedicated to compute the Gaussian potential function in neural networks, Eng. Appl. Artif. Intell., 16 (2003) 595–605. https://doi.org/10.1016/j.engappai.2003.09.010 [D. M. Lewis, 114 MFLOPS Logarithmic Number System Arithmetic Unit for DSP Applications, IEEE J. Solid-State Circuits, 30 (1995) 1547–1553. https://doi.org/10.1109/4.482205 A. Piñeiro, J. D. Bruguera, and J. M. Muller, Faithful powering computation using table look-up and a fused accumulation tree, Proc. - Symp. Comput. Arith., (2001) 40–47. https://doi.org/10.1109/ARITH.2001.930102 Souto Martinez, R. Silva González, and A. Lauri Espíndola, Generalized exponential function and discrete growth models, Phys. A Stat. Mech. its Appl., 388 (2009) 2922–2930. https://doi.org/10.1016/j.physa.2009.03.035 Kapre and A. DeHon, Accelerating SPICE model-evaluation using FPGAs, Proc. - IEEE Symp. F. Program. Cust. Comput. Mach. FCCM 2009, (2009) 37–44. https://doi.org/10.1109/FCCM.2009.14 Echeverría and M. López-Vallejo, An FPGA implementation of the powering function with single precision floating-point arithmetic, Proc. 8th Conf. Real Numbers Comput. Santiago Compost. Spain, pp. 1–10, 2008. Langhammer and B. Pasca, Single precision logarithm and exponential architectures for hard floating-point enabled FPGAS, IEEE Trans. Comput., 66 (2017) 2031–2043. https://doi.org/10.1109/TC.2017.2703923 Daramy-loirat et al., CR-LIBM A library of correctly rounded elementary functions in double-precision, 2009. De Dinechin and B. Pasca, Floating-point exponential functions for DSP-enabled FPGAs, Proc. - 2010 Int. Conf. Field-Programmable Technol. FPT’10, (2010) 110–117. https://doi.org/10.1109/FPT.2010.5681764 Gostiaux, Cours de mathématiques spéciales. Weltner et al., Exponential, Logarithmic and Hyperbolic Functions, Math. Phys. Eng. Fundam. Interact. Study Guid., pp. 71–86, 2014. S. N. Mokhtar, M. B. I. Reaz, K. Chellappan, and M. A. Mohd Ali, Scaling free CORDIC algorithm implementation of sine and cosine function, Lect. Notes Eng. Comput. Sci., 2 (2013) 978–988. D. S. P. Design, Vivado Design Suite Reference Guide, 2012. Volder, The CORDIC computing technique, Proc. West. Jt. Comput. Conf. IRE-AIEE-ACM 1959, 257–261. https://doi.org/10.1145/1457838.1457886 Digital Arithmetic - Ercegovac/Lang 2003, 2004. S. N. Mokhtar, M. I. Ayub, N. Ismail, and N. G. N. Daud, Implementation of Trigonometric Function using CORDIC Algorithms, AIP Conf. Proc.,1930 (2018) 020040. https://doi.org/10.1063/1.5022934 Rajeev, S. G. Neither Newton nor Leibnitz : Sociology of Kerala, 2005. Claudio Canuto and Anita Tabacco, Mathematical Analysis II, Springer Cham. https://doi.org/10.1007/978-3-319-12772-9 Kathewadi, FSCA : Fast sine calculating algorithm, 2009 IEEE Int. Adv. Comput. Conf. IACC 2009, (2009) 165–170. https://doi.org/10.1109/IADCC.2009.4809000 Bhuria and P. Muralidhar, FPGA implementation of sine and cosine value generators using cordic algorithm for satellite attitude determination and calculators, ICPCES 2010 - Int. Conf. Power, Control Embed. Syst., pp. 1–5, 2010, https://doi.org/10.1109/ICPCES.2010.5698645 Song, J. Hu, X. Yang, J. Fu, and X. Xie, A method for data stream processing based on curve fitting, ICSPS 2010 - Proc. 2010 2nd Int. Conf. Signal Process. Syst., 2 (2010) 542–546. https://doi.org/10.1109/ICSPS.2010.5555670 Banerjee and S. Das Bit, An energy efficient image compression scheme for wireless multimedia sensor network using curve fitting technique, Wirel. Networks, 25 (2019) 167–183. https://doi.org/10.1007/s11276-017-1543-9 J. Kriegman and J. Ponce, Parameterized Families of Polynomials for Bounded Algebraic Curve and Surface Fitting, IEEE Trans. Pattern Anal. Mach. Intell., 16 (1994) 287–303. https://doi.org/10.1109/34.276128 A. Sukri, Y. S. Hoe, and T. K. A. Khairuddin, First order polarization tensor approximation using multivariate polynomial interpolation method via least square minimization technique, J. Phys. Conf. Ser., 1988 (2021). https://doi.org/10.1088/1742-6596/1988/1/012013 Koren and O. Zinaty, Evaluating Elementary Functions in a Numerical Coprocessor Based on Rational Approximations, IEEE Trans. Comput., 39 (1990) 1030–1037. https://doi.org/10.1109/12.57042 J. Schulte and E. E. Swartzlander, Hardware Designs for Exactly Rounded Elementary Functions, IEEE Trans. Comput., 43 (1994) 964–973. https://doi.org/10.1109/12.295858 D. L. Saint-Genies, D. Defour, and G. Revy, Exact look-up tables for the evaluation of trigonometric and hyperbolic functions, IEEE Trans. Comput., 66 (2017) 2058–2071. https://doi.org/10.1109/TC.2017.2703870 Muller, JM. 1997. Some Basic Things About Computer Arithmetic. In: Elementary Functions. Birkhäuser, Boston, MA. https://doi.org/10.1007/978-1-4757-2646-6_2 A. Madi and A. Addaim, Optimized Method for Sine and Cosine Hardware Implementation Generator, using CORDIC Algorithm, 13 (2018) 21–29. K. Yousif, I. A. Hashim and B. H. Abd, FPGA Implementation of Polynomial Curve Fitting Approximation for Sine and Cosine Generator, 2022 5th Int. Conf. Eng. Technol. Appl., (2022) 361-366. https://doi.org/10.1109/IICETA54559.2022.9888742

Highlights

Modifying the range of hyperbolic sine and cosine functions from the range (-π/4 to+π/4) to the range (-π to+π). Use three ROMs positive integers, positive values,and negative values, to design the exponential. System stores half wave of hyperbolic sine and cosine functions in memory, instead of storing full wave.

DOI

10.30684/etj.2023.139756.1440

First Page

1091

Last Page

1106

Download

Share

COinS